Novel output buffer designs for universal serial bus IC applications

Hwan Cherng Chow*, Chen Yi Huang, Chih Hong Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Two no veloutput buffer designs with high and low speed operations are proposed for Universal Serial Bus (USB) integrated circuit applications. Principles of these novel buffer circuits are developed based on slew rate con troland delayed turn-on technique, respectively. The proposed circuits feature low cost due to easy realization in a digital CMOS process. F urthermore, the validity is verified by a complete USB transceiver circuit with satisfactory performance.

Original languageEnglish
Title of host publicationICECS 2000 - 7th IEEE International Conference on Electronics, Circuits and Systems
Pages3-6
Number of pages4
DOIs
StatePublished - 2000
Event7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000 - Jounieh, Lebanon
Duration: 17 12 200020 12 2000

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume1

Conference

Conference7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000
Country/TerritoryLebanon
CityJounieh
Period17/12/0020/12/00

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