Novel sidewall strained-Si channel nMOSFET

K. C. Liu; X. Wang; E. Quinones; X. Chen; X. D. Chen; D. Kencke; B. Anantharam; S. K. Ray; S. K. Oswal; S. K. Banerjee

^*Corresponding author for this work

University of Texas at Austin

Research output: Contribution to conference › Conference Paper › peer-review

Abstract

A sidewall tensile-strained Si nMOSFET that does not use a conventional relaxed SiGe buffer layer is presented. The key step is that approximately 120 angstroms Si cap layer is grown over the whole wafer to form tensile-strained Si on the sidewall of tetragonal SiGe, in which the lattice constant parallel to the sidewall of the pillar is stretched out and is larger than that of bulk Si. Electrical results show very good Id-Vg and Id-Vd characteristics. This vertical device shows less punchthrough effects in such a short channel and good on-off transistor characteristics.

Original language	English
Pages	180-181
Number of pages	2
State	Published - 1999
Externally published	Yes
Event	Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC) - Santa Barbara, CA, USA Duration: 28 06 1999 → 30 06 1999

Conference

Conference	Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC)
City	Santa Barbara, CA, USA
Period	28/06/99 → 30/06/99

Cite this

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title = "Novel sidewall strained-Si channel nMOSFET",

abstract = "A sidewall tensile-strained Si nMOSFET that does not use a conventional relaxed SiGe buffer layer is presented. The key step is that approximately 120 angstroms Si cap layer is grown over the whole wafer to form tensile-strained Si on the sidewall of tetragonal SiGe, in which the lattice constant parallel to the sidewall of the pillar is stretched out and is larger than that of bulk Si. Electrical results show very good Id-Vg and Id-Vd characteristics. This vertical device shows less punchthrough effects in such a short channel and good on-off transistor characteristics.",

author = "Liu, \{K. C.\} and X. Wang and E. Quinones and X. Chen and Chen, \{X. D.\} and D. Kencke and B. Anantharam and Ray, \{S. K.\} and Oswal, \{S. K.\} and Banerjee, \{S. K.\}",

year = "1999",

language = "英语",

pages = "180--181",

note = "Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC) ; Conference date: 28-06-1999 Through 30-06-1999",

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TY - CONF

T1 - Novel sidewall strained-Si channel nMOSFET

AU - Liu, K. C.

AU - Wang, X.

AU - Quinones, E.

AU - Chen, X.

AU - Chen, X. D.

AU - Kencke, D.

AU - Anantharam, B.

AU - Ray, S. K.

AU - Oswal, S. K.

AU - Banerjee, S. K.

PY - 1999

Y1 - 1999

N2 - A sidewall tensile-strained Si nMOSFET that does not use a conventional relaxed SiGe buffer layer is presented. The key step is that approximately 120 angstroms Si cap layer is grown over the whole wafer to form tensile-strained Si on the sidewall of tetragonal SiGe, in which the lattice constant parallel to the sidewall of the pillar is stretched out and is larger than that of bulk Si. Electrical results show very good Id-Vg and Id-Vd characteristics. This vertical device shows less punchthrough effects in such a short channel and good on-off transistor characteristics.

AB - A sidewall tensile-strained Si nMOSFET that does not use a conventional relaxed SiGe buffer layer is presented. The key step is that approximately 120 angstroms Si cap layer is grown over the whole wafer to form tensile-strained Si on the sidewall of tetragonal SiGe, in which the lattice constant parallel to the sidewall of the pillar is stretched out and is larger than that of bulk Si. Electrical results show very good Id-Vg and Id-Vd characteristics. This vertical device shows less punchthrough effects in such a short channel and good on-off transistor characteristics.

UR - https://www.scopus.com/pages/publications/0033358761

M3 - 论文

AN - SCOPUS:0033358761

SP - 180

EP - 181

T2 - Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC)

Y2 - 28 June 1999 through 30 June 1999

ER -

Novel sidewall strained-Si channel nMOSFET

Abstract

Conference

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