Abstract
We fabricated a novel vertical sidewall strained-Si device without relaxed SiGe buffer layers in this work. The electrical performance has been characterized using C-V and I-V measurement. TEM pictures show a high quality crystalline tensile-strained-Si layer grown on the sidewall of a compressively-strained SiGe layer. The transconductance measurements of sidewall-tensil-strained Si n-MOSFETs exhibit the role of enhanced electron mobility as tensil strain increases. In addition to device results, the theoretical sidewall conduction and valence band offset calculations, relative to strained SiGe layer, will also be presented in this paper.
Original language | English |
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Pages (from-to) | 63-66 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting, IEDM |
State | Published - 1999 |
Externally published | Yes |
Event | 1999 IEEE International Devices Meeting (IEDM) - Washington, DC, USA Duration: 05 12 1999 → 08 12 1999 |