Novel test methods for die strength

Recently, the 3-D or stacked-die packages are increasingly popular for packaging ICs into a system or subsystem to satisfy the needs of low cost, small form factor, and high performance. For the applications of these packages, IC wafers have to be ground to be relatively thin through the wafers thinning processes (such as grinding, polishing, and plasma etching). The strength of dies has to be determined for the design requirement and thus assuring reliability of the packages. From the published data, there still exist some issues including a large scatter existed in die strength data, and difficulties with differentiating the causes of the low strength from the grinding or die sawing either by three-point bending or four-point bending test. The purposes of this study is to develop new, reliable and simple test methods for determination of die strength to improve the data scatter and also provide a solution for differentiating the factors that affect the variability of die strength, in order to find out the causes of the weakness of the die strength. In this study, two new test methods, point-loaded circular plate with simple supports test (PLT-I) and point-loaded plate on elastic foundation test (PLT-II) are proposed and evaluated by testing two groups of silicon dies with different surface conditions. The surface conditions (roughness) of the specimens are determined by atomic force microscopy and correlated to failure strength. The failure forces from both tests have to be modified by using maximum stress obtained from theory or finite element analysis to get the failure strength. The test results are compared with each other and further with widely-used four-point bending test. The results suggest that, unlike the four-point bending test, both methods provide very consistent data with a small scatter for these two groups of specimens, and indicated the die strength is highly dependent on the surface roughness. Accordingly, these two methods can provide not only a (bi-axial) stress field similar to temperature-loaded die in the packages, but also simple, feasible, reliable and chipping-free tests for silicon dies of dummy or real IC chips, without strict geometrical limitation, such as beam-type geometry for three-point or four-point bending test.