Abstract
In the work, we applied TEOS CVD oxides as gate dielectrics for TFTs with RTN2O annealing combined with NH3 plasma passivation. This process yielded improved electrical characteristics and increased hot-carrier reliability. This is due to the nitrogen pile-up at the poly-Si/SiO2 interface and the strong Si-N bond formation that terminates the dangling bonds in the grains and at the grain boundaries in the channel region. Using the TEOS CVD oxides with rapid thermal annealing in N2O improves the TFT performance and reliability not only by densifying the deposited CVD oxide but also by incorporating the nitrogen into the gate dielectric and polysilicon channel.
Original language | English |
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Article number | 025020 |
Journal | Semiconductor Science and Technology |
Volume | 23 |
Issue number | 2 |
DOIs | |
State | Published - 01 02 2008 |