Abstract
Electrical deactivation of phosphorus was investigated using silicon-on-insulator (SOI) wafers with uniform phosphorus profiles prepared by ion implantation and annealing at high temperatures. Evident depletion of phosphorus was observed in the bulk region of the active silicon layer when electrical deactivation of phosphorus occurred at low temperatures. Such phenomenon was due to uphill diffusion of phosphorus toward the surface. Retrograde profiles of excess interstitials generated during deactivation were proposed to explain the redistribution of phosphorus.
Original language | English |
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Title of host publication | Proceedings of the International Conference on Ion Implantation Technology |
Editors | Mulpuri V. Rao |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781479952120 |
DOIs | |
State | Published - 29 10 2014 |
Event | 20th International Conference on Ion Implantation Technology, IIT 2014 - Portland, United States Duration: 30 06 2014 → 04 07 2014 |
Publication series
Name | Proceedings of the International Conference on Ion Implantation Technology |
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Conference
Conference | 20th International Conference on Ion Implantation Technology, IIT 2014 |
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Country/Territory | United States |
City | Portland |
Period | 30/06/14 → 04/07/14 |
Bibliographical note
Publisher Copyright:© 2014 IEEE.
Keywords
- deactivation
- diffusion
- interstitial
- phosphorus
- silicon-on-insulator