Physical and electrical characteristics of a high-k Yb 2 O 3 gate dielectric

Tung Ming Pan*, Wei Shiang Huang

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

47 Scopus citations

Abstract

High-k ytterbium oxide (Yb 2 O 3 ) gate dielectrics were deposited on Si substrate by reactive sputtering. The structural features of these films after postdeposition annealing treatment were studied by X-ray diffraction and X-ray photoelectron spectroscopy. It is found that the Yb 2 O 3 gate dielectrics annealed at 700 °C exhibit a larger capacitance value, a lower frequency dispersion and a smaller hysteresis voltage in C-V curves compared with other annealing temperatures. They also show negligible charge trapping under high constant voltage stress. This phenomenon is mainly attributed to the decrease in the amorphous silica thickness.

Original languageEnglish
Pages (from-to)4979-4982
Number of pages4
JournalApplied Surface Science
Volume255
Issue number9
DOIs
StatePublished - 15 02 2009

Keywords

  • Amorphous silica
  • High-k Yb O
  • Postdeposition annealing treatment

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