PROGRAMMABLE VLSI ARCHITECTURE FOR COMPUTING MULTIPLICATION AND POLYNOMIAL EVALUATION MODULO A POSITIVE INTEGER.

Erl Huei Lu; Lein Harn; Jau Yien Lee; Wen Yih Hwang

PROGRAMMABLE VLSI ARCHITECTURE FOR COMPUTING MULTIPLICATION AND POLYNOMIAL EVALUATION MODULO A POSITIVE INTEGER.

Erl Huei Lu^*, Lein Harn, Jau Yien Lee, Wen Yih Hwang

^*Corresponding author for this work

National Cheng Kung University

Research output: Contribution to journal › Journal Article › peer-review

Abstract

A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB plus C mod N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0 less than N less than 2**n**-**1 are identical. Therefore, the circuit is well-suited for those systems in which the value of N is alternated frequently.

Original language	English
Journal	IEEE Journal of Solid-State Circuits
Volume	23
Issue number	1
State	Published - 02 1987
Externally published	Yes

Cite this

@article{bd33a0d6545847d79f18425ded8ddf33,

title = "PROGRAMMABLE VLSI ARCHITECTURE FOR COMPUTING MULTIPLICATION AND POLYNOMIAL EVALUATION MODULO A POSITIVE INTEGER.",

abstract = "A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB plus C mod N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0 less than N less than 2**n**-**1 are identical. Therefore, the circuit is well-suited for those systems in which the value of N is alternated frequently.",

author = "Lu, {Erl Huei} and Lein Harn and Lee, {Jau Yien} and Hwang, {Wen Yih}",

year = "1987",

month = feb,

language = "英语",

volume = "23",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

}

TY - JOUR

T1 - PROGRAMMABLE VLSI ARCHITECTURE FOR COMPUTING MULTIPLICATION AND POLYNOMIAL EVALUATION MODULO A POSITIVE INTEGER.

AU - Lu, Erl Huei

AU - Harn, Lein

AU - Lee, Jau Yien

AU - Hwang, Wen Yih

PY - 1987/2

Y1 - 1987/2

N2 - A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB plus C mod N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0 less than N less than 2**n**-**1 are identical. Therefore, the circuit is well-suited for those systems in which the value of N is alternated frequently.

AB - A programmable VLSI architecture with regular, modular, expansible features is designed for computing AB mod N, AB plus C mod N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. The computing procedures for all N throughout the range of 0 less than N less than 2**n**-**1 are identical. Therefore, the circuit is well-suited for those systems in which the value of N is alternated frequently.

UR - http://www.scopus.com/inward/record.url?scp=0023291022&partnerID=8YFLogxK

M3 - 文章

AN - SCOPUS:0023291022

SN - 0018-9200

VL - 23

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 1

ER -

PROGRAMMABLE VLSI ARCHITECTURE FOR COMPUTING MULTIPLICATION AND POLYNOMIAL EVALUATION MODULO A POSITIVE INTEGER.

Abstract

Other files and links

Fingerprint

Cite this