Reconfigurable Bit Precision and Adaptive Power Adjustment In-Memory Computing Circuit Design

I-Chyn Wey; Ting-Yu Kuo; Chia-Wei Su; Chun-Fu Chen; I-Chieh Hsu

Reconfigurable Bit Precision and Adaptive Power Adjustment In-Memory Computing Circuit Design

I-Chyn Wey, Ting-Yu Kuo, Chia-Wei Su, Chun-Fu Chen, I-Chieh Hsu

Department of Electrical Engineering

Research output: Contribution to conference › Proceeding

Original language	American English
State	Published - 2024
Event	The 23rd International Conference on Electronics, Information, and Communication (ICEIC 2024) - Taipei, Taiwan Duration: 28 01 2024 → 31 01 2024

Conference

Conference	The 23rd International Conference on Electronics, Information, and Communication (ICEIC 2024)
Period	28/01/24 → 31/01/24

Cite this

@conference{fab03ec65b9342ee92b33fb497e1f1e0,

title = "Reconfigurable Bit Precision and Adaptive Power Adjustment In-Memory Computing Circuit Design",

author = "I-Chyn Wey and Ting-Yu Kuo and Chia-Wei Su and Chun-Fu Chen and I-Chieh Hsu",

year = "2024",

language = "American English",

note = "The 23rd International Conference on Electronics, Information, and Communication (ICEIC 2024) ; Conference date: 28-01-2024 Through 31-01-2024",

}

TY - CONF

T1 - Reconfigurable Bit Precision and Adaptive Power Adjustment In-Memory Computing Circuit Design

AU - Wey, I-Chyn

AU - Kuo, Ting-Yu

AU - Su, Chia-Wei

AU - Chen, Chun-Fu

AU - Hsu, I-Chieh

PY - 2024

Y1 - 2024

M3 - Proceeding

T2 - The 23rd International Conference on Electronics, Information, and Communication (ICEIC 2024)

Y2 - 28 January 2024 through 31 January 2024

ER -