Recursive Implementation of Multiple Delayed Signal Cancellation Operators and Their Applications in Prefiltered and In-Loop Filtered PLLs under Adverse Grid Conditions

Phase-locked loops (PLLs) are widely utilized for grid synchronization and control of power electronic converters. More recently, both in-loop-filtered-and prefiltered-based PLLs have become more popular due to their prompt and accurate estimations of grid voltage quantities. In the past, an advanced filter viz., multiple delayed signal cancellation (MDSC) operators, has been successfully investigated in both α β-frame and dq-frame for extracting fundamental-frequency positive-sequence grid voltage quantities by using conventional synchronous reference frame PLL. These operators can provide more flexibility to configure the delay time and undesired harmonics in comparison with the existing cascaded delayed signal cancellation operators. In this paper, the recursive-form structures of MDSC operators are analyzed, which are derived from the direct-form MDSC realizations. The recursive-form structures of MDSC operators are simple in implementation when compared to direct-form realizations. With the recursive-form MDSC implementations, both prefiltered MDSC-PLL and in-loop filtered MDSC-PLL will be investigated in detail. The design guidelines of these recursive-form-based MDSC-PLLs are presented. Comparison studies of the proposed PLLs and the validation of their dynamic performances are done by experimental verifications.