Reducing the overkills and retests in wafer testing process

S. C. Horng; S. Y. Lin; M. H. Cheng; F. Y. Yang; C. H. Liu; W. Y. Lee; C. H. Tsai

doi:10.1109/ASMC.2003.1194508

Reducing the overkills and retests in wafer testing process

S. C. Horng, S. Y. Lin, M. H. Cheng, F. Y. Yang, C. H. Liu, W. Y. Lee, C. H. Tsai

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

Reducing overkills is one of the main objectives in the wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.

Original language	English
Title of host publication	2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop
Subtitle of host publication	Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	286-291
Number of pages	6
ISBN (Electronic)	0780376730
DOIs	https://doi.org/10.1109/ASMC.2003.1194508
State	Published - 2003
Event	14th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, ASMC 2003 - Munich, Germany Duration: 31 03 2003 → 01 04 2003

Publication series

Name	ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings
Volume	2003-January
ISSN (Print)	1078-8743

Conference

Conference	14th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, ASMC 2003
Country/Territory	Germany
City	Munich
Period	31/03/03 → 01/04/03

Bibliographical note

Publisher Copyright:
© 2003 IEEE.

Keywords

Assembly
Contacts
Costs
Manufacturing processes
Noise measurement
Optimization methods
Packaging machines
Stochastic processes
Testing
Throughput

Access to Document

10.1109/ASMC.2003.1194508

Cite this

Horng, S. C., Lin, S. Y., Cheng, M. H., Yang, F. Y., Liu, C. H., Lee, W. Y., & Tsai, C. H. (2003). Reducing the overkills and retests in wafer testing process. In 2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop: Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003 (pp. 286-291). Article 1194508 (ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASMC.2003.1194508

Horng, S. C. ; Lin, S. Y. ; Cheng, M. H. et al. / Reducing the overkills and retests in wafer testing process. 2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop: Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 286-291 (ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings).

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title = "Reducing the overkills and retests in wafer testing process",

abstract = "Reducing overkills is one of the main objectives in the wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.",

keywords = "Assembly, Contacts, Costs, Manufacturing processes, Noise measurement, Optimization methods, Packaging machines, Stochastic processes, Testing, Throughput",

author = "Horng, {S. C.} and Lin, {S. Y.} and Cheng, {M. H.} and Yang, {F. Y.} and Liu, {C. H.} and Lee, {W. Y.} and Tsai, {C. H.}",

note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; 14th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, ASMC 2003 ; Conference date: 31-03-2003 Through 01-04-2003",

year = "2003",

doi = "10.1109/ASMC.2003.1194508",

language = "英语",

series = "ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings",

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Horng, SC, Lin, SY, Cheng, MH, Yang, FY, Liu, CH, Lee, WY & Tsai, CH 2003, Reducing the overkills and retests in wafer testing process. in 2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop: Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003., 1194508, ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings, vol. 2003-January, Institute of Electrical and Electronics Engineers Inc., pp. 286-291, 14th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, ASMC 2003, Munich, Germany, 31/03/03. https://doi.org/10.1109/ASMC.2003.1194508

Reducing the overkills and retests in wafer testing process. / Horng, S. C.; Lin, S. Y.; Cheng, M. H. et al.
2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop: Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. 286-291 1194508 (ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings; Vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Horng, S. C.

AU - Lin, S. Y.

AU - Cheng, M. H.

AU - Yang, F. Y.

AU - Liu, C. H.

AU - Lee, W. Y.

AU - Tsai, C. H.

PY - 2003

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N2 - Reducing overkills is one of the main objectives in the wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.

AB - Reducing overkills is one of the main objectives in the wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.

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KW - Contacts

KW - Costs

KW - Manufacturing processes

KW - Noise measurement

KW - Optimization methods

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KW - Throughput

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PB - Institute of Electrical and Electronics Engineers Inc.

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ER -

Horng SC, Lin SY, Cheng MH, Yang FY, Liu CH, Lee WY et al. Reducing the overkills and retests in wafer testing process. In 2003 IEEEI/SEMI Advanced Semiconductor Manufacturing Conference and Workshop: Advancing the Science of Semiconductor Manufacturing Excellence, ASMC 2003. Institute of Electrical and Electronics Engineers Inc. 2003. p. 286-291. 1194508. (ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings). doi: 10.1109/ASMC.2003.1194508

Reducing the overkills and retests in wafer testing process

Abstract

Publication series

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Bibliographical note

Keywords

Access to Document

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