Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Jung Ruey Tsai; Ting Ting Wen; Shao Ming Yang; Gene Sheu; Ruey Dar Chang; Yi Jhen Syu; Chin Ping Liu; Hsiu Fu Chang; Zhao Hui Wei

doi:10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Jung Ruey Tsai, Ting Ting Wen, Shao Ming Yang, Gene Sheu, Ruey Dar Chang, Yi Jhen Syu, Chin Ping Liu, Hsiu Fu Chang, Zhao Hui Wei

Department of Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

Original language	English
Title of host publication	Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	318-321
Number of pages	4
ISBN (Electronic)	9781479999286, 9781479999286
DOIs	https://doi.org/10.1109/IPFA.2015.7224388
State	Published - 25 08 2015
Event	22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 - Hsinchu, Taiwan Duration: 29 06 2015 → 02 07 2015

Publication series

Name	Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
Volume	2015-August

Conference

Conference	22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
Country/Territory	Taiwan
City	Hsinchu
Period	29/06/15 → 02/07/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

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10.1109/IPFA.2015.7224388

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Tsai, J. R., Wen, T. T., Yang, S. M., Sheu, G., Chang, R. D., Syu, Y. J., Liu, C. P., Chang, H. F., & Wei, Z. H. (2015). Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. In Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 (pp. 318-321). Article 7224388 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; Vol. 2015-August). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPFA.2015.7224388

Tsai, Jung Ruey ; Wen, Ting Ting ; Yang, Shao Ming et al. / Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 318-321 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA).

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title = "Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress",

abstract = "This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.",

author = "Tsai, {Jung Ruey} and Wen, {Ting Ting} and Yang, {Shao Ming} and Gene Sheu and Chang, {Ruey Dar} and Syu, {Yi Jhen} and Liu, {Chin Ping} and Chang, {Hsiu Fu} and Wei, {Zhao Hui}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 ; Conference date: 29-06-2015 Through 02-07-2015",

year = "2015",

month = aug,

day = "25",

doi = "10.1109/IPFA.2015.7224388",

language = "英语",

series = "Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Tsai, JR, Wen, TT, Yang, SM, Sheu, G, Chang, RD, Syu, YJ, Liu, CP, Chang, HF & Wei, ZH 2015, Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. in Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015., 7224388, Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA, vol. 2015-August, Institute of Electrical and Electronics Engineers Inc., pp. 318-321, 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015, Hsinchu, Taiwan, 29/06/15. https://doi.org/10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. / Tsai, Jung Ruey; Wen, Ting Ting; Yang, Shao Ming et al.
Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 318-321 7224388 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; Vol. 2015-August).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chang, Ruey Dar

AU - Syu, Yi Jhen

AU - Liu, Chin Ping

AU - Chang, Hsiu Fu

AU - Wei, Zhao Hui

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AB - This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

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Tsai JR, Wen TT, Yang SM, Sheu G, Chang RD, Syu YJ et al. Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. In Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 318-321. 7224388. (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA). doi: 10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

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