Rule-based compactor for VLSI/CAD mask layout

Pei-Yung Hsiao; Chen Yung Syau; Wu Shiung Feng; T. M. Parng; C. C. Hsu

Rule-based compactor for VLSI/CAD mask layout

Pei-Yung Hsiao^*
, Chen Yung Syau
, Wu Shiung Feng
, T. M. Parng
, C. C. Hsu

^*Corresponding author for this work

National Taiwan University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

A rule-based system, to be used in place of the conventional approaches using algorithms, is proposed to explore the feasibility of using expert-system technology to automate the compaction process by reasoning about the layout design using the sophisticated expert rules contained in its knowledge base. It has been demonstrated that, given a process-independent mask layout, the design rules, user specified constraints, and circuit electrical requirements can be checked over and rearranged into an optimized state. The system considered consists of approximately 100 Kbytes of source code and contains 120 rules. The compactor is written in a combination of the Lisp and OPS5 languages.

Original language	English
Title of host publication	Proceedings - IEEE Computer Society's International Computer Software & Applications Conference
Editors	George J. Knafl
Publisher	Publ by IEEE
Pages	35-42
Number of pages	8
ISBN (Print)	0818608730
State	Published - 1988
Externally published	Yes

Publication series

Name	Proceedings - IEEE Computer Society's International Computer Software & Applications Conference

Cite this

@inproceedings{ed1785b7b8ac42849b757ac02af1a419,

title = "Rule-based compactor for VLSI/CAD mask layout",

abstract = "A rule-based system, to be used in place of the conventional approaches using algorithms, is proposed to explore the feasibility of using expert-system technology to automate the compaction process by reasoning about the layout design using the sophisticated expert rules contained in its knowledge base. It has been demonstrated that, given a process-independent mask layout, the design rules, user specified constraints, and circuit electrical requirements can be checked over and rearranged into an optimized state. The system considered consists of approximately 100 Kbytes of source code and contains 120 rules. The compactor is written in a combination of the Lisp and OPS5 languages.",

author = "Pei-Yung Hsiao and Syau, \{Chen Yung\} and Feng, \{Wu Shiung\} and Parng, \{T. M.\} and Hsu, \{C. C.\}",

year = "1988",

language = "英语",

isbn = "0818608730",

series = "Proceedings - IEEE Computer Society's International Computer Software \& Applications Conference",

publisher = "Publ by IEEE",

pages = "35--42",

editor = "Knafl, \{George J.\}",

booktitle = "Proceedings - IEEE Computer Society's International Computer Software \& Applications Conference",

}

Rule-based compactor for VLSI/CAD mask layout. / Hsiao, Pei-Yung; Syau, Chen Yung; Feng, Wu Shiung et al.
Proceedings - IEEE Computer Society's International Computer Software & Applications Conference. ed. / George J. Knafl. Publ by IEEE, 1988. p. 35-42 (Proceedings - IEEE Computer Society's International Computer Software & Applications Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Rule-based compactor for VLSI/CAD mask layout

AU - Hsiao, Pei-Yung

AU - Syau, Chen Yung

AU - Feng, Wu Shiung

AU - Parng, T. M.

AU - Hsu, C. C.

PY - 1988

Y1 - 1988

N2 - A rule-based system, to be used in place of the conventional approaches using algorithms, is proposed to explore the feasibility of using expert-system technology to automate the compaction process by reasoning about the layout design using the sophisticated expert rules contained in its knowledge base. It has been demonstrated that, given a process-independent mask layout, the design rules, user specified constraints, and circuit electrical requirements can be checked over and rearranged into an optimized state. The system considered consists of approximately 100 Kbytes of source code and contains 120 rules. The compactor is written in a combination of the Lisp and OPS5 languages.

AB - A rule-based system, to be used in place of the conventional approaches using algorithms, is proposed to explore the feasibility of using expert-system technology to automate the compaction process by reasoning about the layout design using the sophisticated expert rules contained in its knowledge base. It has been demonstrated that, given a process-independent mask layout, the design rules, user specified constraints, and circuit electrical requirements can be checked over and rearranged into an optimized state. The system considered consists of approximately 100 Kbytes of source code and contains 120 rules. The compactor is written in a combination of the Lisp and OPS5 languages.

UR - https://www.scopus.com/pages/publications/0024136271

M3 - 会议稿件

AN - SCOPUS:0024136271

SN - 0818608730

T3 - Proceedings - IEEE Computer Society's International Computer Software & Applications Conference

SP - 35

EP - 42

BT - Proceedings - IEEE Computer Society's International Computer Software & Applications Conference

A2 - Knafl, George J.

PB - Publ by IEEE

ER -

Rule-based compactor for VLSI/CAD mask layout

Abstract

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