Abstract
Applying dynamic voltage scaling technique to design a low-power register file plays an important role in modern embedded-processor design. In this paper, we propose a compiler-aided approach to find out in a program which and when the registers would not be used, and to turn these unused registers into low power mode through voltage-scaling controls. The proposed approach can be partitioned into the software mechanism and the hardware logic. For the software mechanism, we exploit register-usage and schedule voltage-scaling controls at selected points in a program. For the hardware logic, we propose a "connected" recorder to store power states for multiple registers such that sequential voltage-scaling controls can be performed in a batch, instead of one power-state update just for only one register. Simulation results show that the proposed approach not only improves total register file energy consumption by 21%-28% through leakage energy saving, but also provides well trade-offs in the term of energy-delay product.
Original language | English |
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Pages (from-to) | 1429-1444 |
Number of pages | 16 |
Journal | Journal of Information Science and Engineering |
Volume | 24 |
Issue number | 5 |
State | Published - 09 2008 |
Keywords
- Dynamic voltage scaling
- Leakage energy
- Register assignment
- Register file
- Register-usage exploiting