Scalable and systolic montgomery multipliers over GF(2m)

Chin Chin Chen, Chiou Yng Lee*, Eri Huei Lu

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

27 Scopus citations

Abstract

This work presents a novel scalable and systolic Montgomery's algorithm in GF(2m). The proposed algorithm is based on the Toeplitz matrix-vector representation, which obtains the scalable and systolic Montgomery multiplier in a flexible manner, and can adapt to the required precision. Analytical results indicate that the proposed multiplier over the generic field of GF(2m) has a latency of d + n(2n +1), where n = [m/d], and d denotes the selected digital size. The latency is reduced to d + n(n + 1) clock cycles when the field is constructed from generalized equally-spaced polynomials. Since the selected digital size is d ≥ 5 bits, the proposed architectures have lower time-space complexity than traditional digit-serial multipliers. Moreover, the proposed architectures have regularity, modularity and local interconnect ability, making them very suitable for VLSI implementation.

Original languageEnglish
Pages (from-to)1763-1771
Number of pages9
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE91-A
Issue number7
DOIs
StatePublished - 2008

Keywords

  • Montgomery
  • Scalable architecture
  • Systolic multiplier
  • Toeplitz matrix-vector

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