Soft-error tolerant design in near-threshold-voltage computing

I. Chyn Wey; Si Zhan Fang; Heng Jui Chou; Zhan You Wu

doi:10.1109/ICASI.2018.8394533

Soft-error tolerant design in near-threshold-voltage computing

I. Chyn Wey, Si Zhan Fang, Heng Jui Chou, Zhan You Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

In the advanced CMOS VLSI designs, lower supply voltage and smaller transistor lead to critical design challenges in dealing with soft-error interference, especial for the deisgn operating under near-threshold voltage. Some possible near-threshold voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Dual-Modular-Redundancy, Error-Correction with Duplication, and Error-Correction-with-shift-Timing-Output designs.

Original language	English
Title of host publication	Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018
Editors	Artde Donald Kin-Tak Lam, Stephen D. Prior, Teen-Hang Meen
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1308-1309
Number of pages	2
ISBN (Electronic)	9781538643426
DOIs	https://doi.org/10.1109/ICASI.2018.8394533
State	Published - 22 06 2018
Event	4th IEEE International Conference on Applied System Innovation, ICASI 2018 - Chiba, Japan Duration: 13 04 2018 → 17 04 2018

Publication series

Name	Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018

Conference

Conference	4th IEEE International Conference on Applied System Innovation, ICASI 2018
Country/Territory	Japan
City	Chiba
Period	13/04/18 → 17/04/18

Bibliographical note

Publisher Copyright:
© 2018 IEEE.

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10.1109/ICASI.2018.8394533

Cite this

Wey, I. C., Fang, S. Z., Chou, H. J., & Wu, Z. Y. (2018). Soft-error tolerant design in near-threshold-voltage computing. In A. D. K.-T. Lam, S. D. Prior, & T.-H. Meen (Eds.), Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018 (pp. 1308-1309). (Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICASI.2018.8394533

Wey, I. Chyn ; Fang, Si Zhan ; Chou, Heng Jui et al. / Soft-error tolerant design in near-threshold-voltage computing. Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018. editor / Artde Donald Kin-Tak Lam ; Stephen D. Prior ; Teen-Hang Meen. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1308-1309 (Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018).

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title = "Soft-error tolerant design in near-threshold-voltage computing",

abstract = "In the advanced CMOS VLSI designs, lower supply voltage and smaller transistor lead to critical design challenges in dealing with soft-error interference, especial for the deisgn operating under near-threshold voltage. Some possible near-threshold voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Dual-Modular-Redundancy, Error-Correction with Duplication, and Error-Correction-with-shift-Timing-Output designs.",

author = "Wey, {I. Chyn} and Fang, {Si Zhan} and Chou, {Heng Jui} and Wu, {Zhan You}",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 4th IEEE International Conference on Applied System Innovation, ICASI 2018 ; Conference date: 13-04-2018 Through 17-04-2018",

year = "2018",

month = jun,

day = "22",

doi = "10.1109/ICASI.2018.8394533",

language = "英语",

series = "Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1308--1309",

editor = "Lam, {Artde Donald Kin-Tak} and Prior, {Stephen D.} and Teen-Hang Meen",

booktitle = "Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018",

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}

Wey, IC, Fang, SZ, Chou, HJ & Wu, ZY 2018, Soft-error tolerant design in near-threshold-voltage computing. in ADK-T Lam, SD Prior & T-H Meen (eds), Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018. Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018, Institute of Electrical and Electronics Engineers Inc., pp. 1308-1309, 4th IEEE International Conference on Applied System Innovation, ICASI 2018, Chiba, Japan, 13/04/18. https://doi.org/10.1109/ICASI.2018.8394533

Soft-error tolerant design in near-threshold-voltage computing. / Wey, I. Chyn; Fang, Si Zhan; Chou, Heng Jui et al.
Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018. ed. / Artde Donald Kin-Tak Lam; Stephen D. Prior; Teen-Hang Meen. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1308-1309 (Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - In the advanced CMOS VLSI designs, lower supply voltage and smaller transistor lead to critical design challenges in dealing with soft-error interference, especial for the deisgn operating under near-threshold voltage. Some possible near-threshold voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Dual-Modular-Redundancy, Error-Correction with Duplication, and Error-Correction-with-shift-Timing-Output designs.

AB - In the advanced CMOS VLSI designs, lower supply voltage and smaller transistor lead to critical design challenges in dealing with soft-error interference, especial for the deisgn operating under near-threshold voltage. Some possible near-threshold voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Dual-Modular-Redundancy, Error-Correction with Duplication, and Error-Correction-with-shift-Timing-Output designs.

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A2 - Lam, Artde Donald Kin-Tak

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Wey IC, Fang SZ, Chou HJ, Wu ZY. Soft-error tolerant design in near-threshold-voltage computing. In Lam ADKT, Prior SD, Meen TH, editors, Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1308-1309. (Proceedings of 4th IEEE International Conference on Applied System Innovation 2018, ICASI 2018). doi: 10.1109/ICASI.2018.8394533

Soft-error tolerant design in near-threshold-voltage computing

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