Soft-Event-Upset and Soft-Event-Transient Tolerant CMOS Circuit Design for Low-Voltage Low-Power Wireless IoT Applications

I. Chyn Wey, Chun Han Chen, Si Zhan Fang, Heng Jui Chou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In the wireless IoT applications, low power is a critical criteria, and low-voltage is a direct way to meet such demand. However, low-voltage criteria in advanced CMOS VLSI designs will lead to critical design challenges in dealing with soft-error interference, especial while the cascade transistor number is limited under low-voltage operations. Some possible low-voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Error-Correction with Duplication, dual interlocked storage cell (DICE) latch, and such as feedback redundant SEU-tolerant (FERST) latch designs.

Original languageEnglish
Title of host publicationICUFN 2019 - 11th International Conference on Ubiquitous and Future Networks
PublisherIEEE Computer Society
Pages179-181
Number of pages3
ISBN (Electronic)9781728113395
DOIs
StatePublished - 07 2019
Externally publishedYes
Event11th International Conference on Ubiquitous and Future Networks, ICUFN 2019 - Zagreb, Croatia
Duration: 02 07 201905 07 2019

Publication series

NameInternational Conference on Ubiquitous and Future Networks, ICUFN
Volume2019-July
ISSN (Print)2165-8528
ISSN (Electronic)2165-8536

Conference

Conference11th International Conference on Ubiquitous and Future Networks, ICUFN 2019
Country/TerritoryCroatia
CityZagreb
Period02/07/1905/07/19

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

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