Software viterbi decoder with SSE4 parallel processing instructions for software dvb-t receiver

Shu Ming Tseng, Yu Chin Kuo, Yen Chih Ku, Yueh Teng Hsu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

13 Scopus citations

Abstract

In this paper, we discuss the procedures how to make Viterbi decoder faster. The implementation in Intel CPU with SSE4 parallel processing instruction sets and some other methods achieves the decoding speed 47.05 Mbps (0.64 Mbps originally). The DVB-T mode used in Taiwan needs 13.27 Mbps to achieve real-time reception, so our implementation of software Viterbi decoder takes only 28% CPU loading.

Original languageEnglish
Title of host publicationProceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009
Pages102-105
Number of pages4
DOIs
StatePublished - 2009
Externally publishedYes
Event2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009 - Chengdu, Sichuan, China
Duration: 09 08 200912 08 2009

Publication series

NameProceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009

Conference

Conference2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009
Country/TerritoryChina
CityChengdu, Sichuan
Period09/08/0912/08/09

Keywords

  • Parallel processing
  • Software defined radio
  • Viterbi algorithm

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