Abstract
A failure shape analysis system is developed to quickly analyze the defect distribution of memories for diagnosis. Compared to the original system, the newer one consists of several programs feasible both on workstations and PCs. The included programs transform and grasp the specific data for further failure analysis. The complete system is highly reliable and fault tolerant for the entire manufacture and test procedure. It can achieve the similar defect distribution as the original system but with only 11% and 6% of run time on workstations and PCs, respectively.
| Original language | English |
|---|---|
| Pages (from-to) | 634-641 |
| Number of pages | 8 |
| Journal | WSEAS Transactions on Circuits and Systems |
| Volume | 4 |
| Issue number | 6 |
| State | Published - 06 2005 |
Keywords
- Defect cell
- Fail bit map
- Fail pattern
- Failure shape
- Failure shape analysis
- Wafer fail bit map