Structural properties and electrical characteristics of high-k Dy 2 O 3 gate dielectrics

Tung Ming Pan*, Wei Tsung Chang, Fu Chien Chiu

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

39 Scopus citations

Abstract

This paper describes the structural properties and electrical characteristics of thin Dy 2 O 3 dielectrics deposited on silicon substrates by means of reactive sputtering. The structural and morphological features of these films after postdeposition annealing were studied by X-ray diffraction and X-ray photoelectron spectroscopy. It is found that Dy 2 O 3 dielectrics annealed at 700 °C exhibit a thinner capacitance equivalent thickness and better electrical properties, including the interface trap density and the hysteresis in the capacitance-voltage curves. Under constant current stress, the Weibull slope of the charge-to-breakdown of the 700 °C-annealed films is about 1.6. These results are attributed to the formation of well-crystallized Dy 2 O 3 structure and the reduction of the interfacial SiO 2 layer.

Original languageEnglish
Pages (from-to)3964-3968
Number of pages5
JournalApplied Surface Science
Volume257
Issue number9
DOIs
StatePublished - 15 02 2011

Keywords

  • Gate dielectric
  • Postdeposition annealing (PDA)

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