Technology CAD of SiGe-heterojunction field effect transistors

S. Maikap; B. Senapati; C. K. Maiti

doi:10.14429/dsj.51.2230

Technology CAD of SiGe-heterojunction field effect transistors

S. Maikap^*
, B. Senapati
, C. K. Maiti

^*Corresponding author for this work

Indian Institute of Technology Kharagpur

Research output: Contribution to journal › Journal Article › peer-review

1 Scopus citations

Abstract

A 2-D virtual wafer fabrication simulation suite has been employed for the technology CAD of SiGe channel heterojunction field effect transistors (HFETs). Complete fabrication process of SiGep-HFETs has been simulated. The SiGe material parameters and mobility model were incorporated to simulate Si/SiGe p-HFETs with a uniform germanium channel having an L_eff of 0.5 μm. A significant improvement in linear transconductance is observed when compared to control-silicon p-MOSFETs.

Original language	English
Pages (from-to)	195-199
Number of pages	5
Journal	Defence Science Journal
Volume	51
Issue number	2
DOIs	https://doi.org/10.14429/dsj.51.2230
State	Published - 04 2001
Externally published	Yes

Keywords

CMOS circuits
Computer-aided design
Heterojunction field effect transistors
Heterostructure devices
MOSFETs
SiGe p-HFETs
Virtual wafer fabrication simulation

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10.14429/dsj.51.2230

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title = "Technology CAD of SiGe-heterojunction field effect transistors",

abstract = "A 2-D virtual wafer fabrication simulation suite has been employed for the technology CAD of SiGe channel heterojunction field effect transistors (HFETs). Complete fabrication process of SiGep-HFETs has been simulated. The SiGe material parameters and mobility model were incorporated to simulate Si/SiGe p-HFETs with a uniform germanium channel having an Leff of 0.5 μm. A significant improvement in linear transconductance is observed when compared to control-silicon p-MOSFETs.",

keywords = "CMOS circuits, Computer-aided design, Heterojunction field effect transistors, Heterostructure devices, MOSFETs, SiGe p-HFETs, Virtual wafer fabrication simulation",

author = "S. Maikap and B. Senapati and Maiti, \{C. K.\}",

year = "2001",

month = apr,

doi = "10.14429/dsj.51.2230",

language = "英语",

volume = "51",

pages = "195--199",

journal = "Defence Science Journal",

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TY - JOUR

T1 - Technology CAD of SiGe-heterojunction field effect transistors

AU - Maikap, S.

AU - Senapati, B.

AU - Maiti, C. K.

PY - 2001/4

Y1 - 2001/4

N2 - A 2-D virtual wafer fabrication simulation suite has been employed for the technology CAD of SiGe channel heterojunction field effect transistors (HFETs). Complete fabrication process of SiGep-HFETs has been simulated. The SiGe material parameters and mobility model were incorporated to simulate Si/SiGe p-HFETs with a uniform germanium channel having an Leff of 0.5 μm. A significant improvement in linear transconductance is observed when compared to control-silicon p-MOSFETs.

AB - A 2-D virtual wafer fabrication simulation suite has been employed for the technology CAD of SiGe channel heterojunction field effect transistors (HFETs). Complete fabrication process of SiGep-HFETs has been simulated. The SiGe material parameters and mobility model were incorporated to simulate Si/SiGe p-HFETs with a uniform germanium channel having an Leff of 0.5 μm. A significant improvement in linear transconductance is observed when compared to control-silicon p-MOSFETs.

KW - CMOS circuits

KW - Computer-aided design

KW - Heterojunction field effect transistors

KW - Heterostructure devices

KW - MOSFETs

KW - SiGe p-HFETs

KW - Virtual wafer fabrication simulation

UR - https://www.scopus.com/pages/publications/0035302288

U2 - 10.14429/dsj.51.2230

DO - 10.14429/dsj.51.2230

M3 - 文章

AN - SCOPUS:0035302288

SN - 0011-748X

VL - 51

SP - 195

EP - 199

JO - Defence Science Journal

JF - Defence Science Journal

IS - 2

ER -

Technology CAD of SiGe-heterojunction field effect transistors

Abstract

Keywords

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