Ultra-low-loss and broadband micromachined inductors and transformers for 30-100 GHz CMOS RFIC applications by CMOS-compatible ICP deep trench technology

A CMOS-compatible backside inductively-coupled-plasma (ICP) deep trench technology has been developed to enhance the performances of RF monolithic inductors and transformers for 30-100 GHz CMOS RFIC applications. The results show that an 112.8% (from 14.37 to 30.58) and a 201.1% (from 6.33 to 19.06) increase in Q-factor, a 9.7% (from 0.91 to 0.998) and a 28.3% (from 0.778 to 0.998) increase in maximum available power gain (G_Amax), and a 0.404 dB (from 0.412 dB to 7.6×10^-3 dB) and a 1.082 dB (from 1.09 dB to 8.4×10^-3 dB) reduction in minimum noise figure (NF _min) were achieved at 30 GHz and 60 GHz, respectively, for a 162.2 pH TL inductor after the backside ICP dry etching. In addition, we demonstrate that high-coupling and ultra-low-loss 30-100 GHz transformers can be achieved by using single-turn two-layer interlaced stacked (STIS) structure implemented in a standard CMOS technology. Significant improvements in Q-factor (from 5.04 to 29.8 at 70 GHz) and G_Amax (from 0.885 to 0.984 at 70 GHz) were achieved for the STIS transformers after the ICP etching. Besides, the ICP technology is also capable of improving the isolation between RF/analog and digital circuits and thus paves a way for SOC.