Via minimization with associated constraints in three-layer routing problem

Sung Chuan Fang; Kuo En Chang; Wu Shiung Feng

Via minimization with associated constraints in three-layer routing problem

Sung Chuan Fang^*, Kuo En Chang, Wu Shiung Feng

^*Corresponding author for this work

National Taiwan University

Research output: Contribution to journal › Conference article › peer-review

5 Scopus citations

Abstract

Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.

Original language	English
Pages (from-to)	1632-1635
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2
State	Published - 1990
Externally published	Yes
Event	1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA Duration: 01 05 1990 → 03 05 1990

Cite this

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title = "Via minimization with associated constraints in three-layer routing problem",

abstract = "Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.",

author = "Fang, {Sung Chuan} and Chang, {Kuo En} and Feng, {Wu Shiung}",

year = "1990",

language = "英语",

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journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

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note = "1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) ; Conference date: 01-05-1990 Through 03-05-1990",

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T1 - Via minimization with associated constraints in three-layer routing problem

AU - Fang, Sung Chuan

AU - Chang, Kuo En

AU - Feng, Wu Shiung

PY - 1990

Y1 - 1990

N2 - Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.

AB - Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.

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M3 - 会议文章

AN - SCOPUS:0025692528

SN - 0271-4310

VL - 2

SP - 1632

EP - 1635

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - 1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)

Y2 - 1 May 1990 through 3 May 1990

ER -

Via minimization with associated constraints in three-layer routing problem

Abstract

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