抗軟錯誤之栓鎖器/暫存器電路設計與晶片實現

Engineering

1. Circuit Design 100%
2. Clock Signal 12%
3. Contention 12%
4. Design Complexity 12%
5. Error Rate 50%
6. Feedback Path 12%
7. Fits and Tolerances 12%
8. Flip Flop Circuits 100%
9. Gate Capacitance 12%
10. Nanoscale 12%
11. Noise Immunity 12%
12. Output Node 12%
13. Power Supply 12%
14. Propagation Delay 12%
15. Schmitt Trigger 12%
16. Single Event Upset 100%
17. Soft Error 50%
18. Soft Error 50%
19. Supply Voltage 25%
20. System-on-Chip 62%

Computer Science

1. Control Signal 14%
2. Design Challenge 14%
3. Design Complexity 14%
4. Gate Capacitance 14%
5. Power Supply Voltage 14%
6. Propagation Delay 14%
7. Soft Error 100%
8. Supply Voltage 14%
9. System-on-Chip 35%