摘要
A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.
原文 | 英語 |
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頁(從 - 到) | 105-119 |
頁數 | 15 |
期刊 | Analog Integrated Circuits and Signal Processing |
卷 | 6 |
發行號 | 2 |
DOIs | |
出版狀態 | 已出版 - 09 1994 |
對外發佈 | 是 |