A 16-bit sigma-delta A/D converter with high-performance operational amplifiers

Joongho Choi*, Bing J. Sheu, Bang W. Lee

*此作品的通信作者

研究成果: 期刊稿件文章同行評審

7 引文 斯高帕斯(Scopus)

摘要

A fourth-order interpolative modulator was designed and fabricated in a 2-μm CMOS technology. As a key building block, a fully-differential folded-cascode operational amplifier has been developed and successfully tested. The main design emphasis is placed on achieving a fast settling behavior. The fully-differential analog modulator operates at the rate of 5.12 MHz and provides a signal-to-noise ratio higher than 96 dB for 16-bit analog-to-digital conversion.

原文英語
頁(從 - 到)105-119
頁數15
期刊Analog Integrated Circuits and Signal Processing
6
發行號2
DOIs
出版狀態已出版 - 09 1994
對外發佈

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