摘要
VLSI design of a competitive neural network for video motion detection is presented. Massively parallel neurocomputing is performed by compact and efficient neuroprocessors. Local data transfer between the neuroprocessors is carried out by using an analog point-to-point interconnection scheme, while global data communication between the host computer and neuroprocessors is achieved through a digital common bus. Experimental results of the analog circuit blocks and system-level analysis on a sequence of real-world images are also presented.
原文 | 英語 |
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頁(從 - 到) | 57-66 |
頁數 | 10 |
期刊 | Journal of VLSI Signal Processing |
卷 | 6 |
發行號 | 1 |
DOIs | |
出版狀態 | 已出版 - 06 1993 |
對外發佈 | 是 |