A new direct design for three-input xor function on the transistor level

Sung Chuan Fang*, Jyh Ming Wang, Wu Shiung Feng

*此作品的通信作者

研究成果: 期刊稿件文章同行評審

18 引文 斯高帕斯(Scopus)

摘要

Instead of cascading two two-input XOR gates, we design a new structure of three-input function on the transistor level in this paper. The basic structure of the proposed three-input XOR function utilizes the least number of transistors and no complementary input signals are needed. From the realistic-simulated results, it proves the basic structure works very well. Under the consideration of driving capacity, we can simply attach a standard buffer to the basic structure for this purpose. The experiments verify that our driving-enhanced three-input XOR gate has more driving capacity and use less power consumption as well as power-delay product than the past cascaded designs using the same number of transistors. The simulation work is done by HSPICE on a SUN SPARC10 workstation.

原文英語
頁(從 - 到)343-348
頁數6
期刊IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
43
發行號4
DOIs
出版狀態已出版 - 1996
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