A Surface Potential Model for Metal-Oxide-Semiconductor Transistors Operating near the Threshold Voltage

Device physics and accurate transistor modeling are necessary to reduce the operating voltage near the threshold for power-constrained circuits. Conventional device modeling for metal-oxide-semiconductor (MOS) transistors focuses on operations in either strong or weak inversion regimes, and the electrostatics at gate biases near the threshold voltage is rarely studied. This research proposed an analytical model to describe the distribution of the surface potential along the channel for near-threshold operation. Numerical device simulations were also performed to investigate the electrostatics near the threshold voltage. The numerical simulation with constant carrier mobility showed an overshoot in the transconductance due to decay of the lateral electric field with gate bias. The decay of the lateral electric field was predicted by the proposed analytical surface potential model which considered widening the channel length with flooding of the inversion carriers in the channel and gate overlap regions. The channel length widening effect saturated as the gate bias further increased. Therefore, evident transconductance overshoot was observed near the threshold voltage in short-channel devices.