A switched delay line based optical switch architecture with a bypass line

Ho Ting Wu; Kai Wei Ke; Wang Rong Chang; Hui Tang Lin

doi:10.1109/ISCAS.2005.1464892

A switched delay line based optical switch architecture with a bypass line

Ho Ting Wu
, Kai Wei Ke
, Wang Rong Chang
, Hui Tang Lin

National Taipei University of Technology
National Cheng Kung University

研究成果: 期刊稿件 › 會議文章 › 同行評審

5 引文斯高帕斯（Scopus）

摘要

This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 × 2 two-stage multi-buffer switched delay line based optical switching node, known as M-Quadro node. By incorporating bypass lines and employing a novel switch control strategy, denoted as LAVS, the switching node can effectively resolve packet contentions, thus reducing the packet deflection probability substantially.

原文	英語
文章編號	1464892
頁（從 - 到）	1533-1536
頁數	4
期刊	Proceedings - IEEE International Symposium on Circuits and Systems
DOIs	https://doi.org/10.1109/ISCAS.2005.1464892
出版狀態	已出版 - 2005
對外發佈	是
事件	IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, 日本持續時間: 23 05 2005 → 26 05 2005

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10.1109/ISCAS.2005.1464892

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title = "A switched delay line based optical switch architecture with a bypass line",

abstract = "This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 {\texttimes} 2 two-stage multi-buffer switched delay line based optical switching node, known as M-Quadro node. By incorporating bypass lines and employing a novel switch control strategy, denoted as LAVS, the switching node can effectively resolve packet contentions, thus reducing the packet deflection probability substantially.",

keywords = "Bypass Line, Optical Switch, Switched Delay Line",

author = "Wu, \{Ho Ting\} and Ke, \{Kai Wei\} and Chang, \{Wang Rong\} and Lin, \{Hui Tang\}",

year = "2005",

doi = "10.1109/ISCAS.2005.1464892",

language = "英语",

pages = "1533--1536",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 ; Conference date: 23-05-2005 Through 26-05-2005",

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TY - JOUR

T1 - A switched delay line based optical switch architecture with a bypass line

AU - Wu, Ho Ting

AU - Ke, Kai Wei

AU - Chang, Wang Rong

AU - Lin, Hui Tang

PY - 2005

Y1 - 2005

N2 - This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 × 2 two-stage multi-buffer switched delay line based optical switching node, known as M-Quadro node. By incorporating bypass lines and employing a novel switch control strategy, denoted as LAVS, the switching node can effectively resolve packet contentions, thus reducing the packet deflection probability substantially.

AB - This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 × 2 two-stage multi-buffer switched delay line based optical switching node, known as M-Quadro node. By incorporating bypass lines and employing a novel switch control strategy, denoted as LAVS, the switching node can effectively resolve packet contentions, thus reducing the packet deflection probability substantially.

KW - Bypass Line

KW - Optical Switch

KW - Switched Delay Line

UR - https://www.scopus.com/pages/publications/65349122365

U2 - 10.1109/ISCAS.2005.1464892

DO - 10.1109/ISCAS.2005.1464892

M3 - 会议文章

AN - SCOPUS:65349122365

SN - 0271-4310

SP - 1533

EP - 1536

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

M1 - 1464892

T2 - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

Y2 - 23 May 2005 through 26 May 2005

ER -

A switched delay line based optical switch architecture with a bypass line

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