TY - JOUR
T1 - A two-way simd-based reconfigurable computing architecture for multimedia applications
AU - Lai, Yeong Kang
AU - Chen, Lien Fei
AU - Chen, Jian Chou
AU - Chiu, Chun Wei
PY - 2005
Y1 - 2005
N2 - In this paper, a novel reconfigurable computing architecture for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also can execute 8-bit, 16-bit, 32-bit SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit. Owing to the above features, Multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.
AB - In this paper, a novel reconfigurable computing architecture for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also can execute 8-bit, 16-bit, 32-bit SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit. Owing to the above features, Multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.
UR - http://www.scopus.com/inward/record.url?scp=33746228882&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2005.1465651
DO - 10.1109/ISCAS.2005.1465651
M3 - 会议文章
AN - SCOPUS:33746228882
SN - 0271-4310
SP - 4578
EP - 4581
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
M1 - 1465651
T2 - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
Y2 - 23 May 2005 through 26 May 2005
ER -