Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications

Cihun Siyong Alex Gong; Muh Tian Shiue; Ci Tong Hong; Chun Hsien Su; Kai Wen Yao

doi:10.1109/SOCC.2007.4545468

Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications

Cihun Siyong Alex Gong
, Muh Tian Shiue
, Ci Tong Hong
, Chun Hsien Su
, Kai Wen Yao

National Central University

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

4 引文斯高帕斯（Scopus）

摘要

A complementary energy path adiabatic logic (CEPAL) designed for ubiquitous large-scaled digital systems achieves higher noise immunity, higher driving ability, and reduced power density than the prior quasi-static structure. By applying CEPAL to the clocked storage elements (i.e. DFFs) with a diode-shared scheme, the overall efficiency is dramatically improved without increasing the design overhead compared with the quasi-static implementation. A test module consists of an 8-bit CEPAL shift register (SFR) has been laid out in a 0.18-μm CMOS process. Post-layout analytic results, including parasitic effect and exhibiting the benefits of various aspects in the proposed fashion, are given as proof of concept.

原文	英語
主出版物標題	Proceedings - 20th Anniversary IEEE International SOC Conference
頁面	247-250
頁數	4
DOIs	https://doi.org/10.1109/SOCC.2007.4545468
出版狀態	已出版 - 2007
對外發佈	是
事件	20th Anniversary IEEE International SOC Conference - Hsinchu, 台灣持續時間: 26 09 2007 → 29 09 2007

出版系列

名字	Proceedings - 20th Anniversary IEEE International SOC Conference

Conference

Conference	20th Anniversary IEEE International SOC Conference
國家/地區	台灣
城市	Hsinchu
期間	26/09/07 → 29/09/07

存取文件

10.1109/SOCC.2007.4545468

其它文件與鏈接

Link to publication in Scopus

引用此

Gong, C. S. A., Shiue, M. T., Hong, C. T., Su, C. H., & Yao, K. W. (2007). Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications. 於 Proceedings - 20th Anniversary IEEE International SOC Conference (頁 247-250). 文章 4545468 (Proceedings - 20th Anniversary IEEE International SOC Conference). https://doi.org/10.1109/SOCC.2007.4545468

@inproceedings{e7966a253fcd48508a0d272749099e56,

title = "Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications",

abstract = "A complementary energy path adiabatic logic (CEPAL) designed for ubiquitous large-scaled digital systems achieves higher noise immunity, higher driving ability, and reduced power density than the prior quasi-static structure. By applying CEPAL to the clocked storage elements (i.e. DFFs) with a diode-shared scheme, the overall efficiency is dramatically improved without increasing the design overhead compared with the quasi-static implementation. A test module consists of an 8-bit CEPAL shift register (SFR) has been laid out in a 0.18-μm CMOS process. Post-layout analytic results, including parasitic effect and exhibiting the benefits of various aspects in the proposed fashion, are given as proof of concept.",

author = "Gong, \{Cihun Siyong Alex\} and Shiue, \{Muh Tian\} and Hong, \{Ci Tong\} and Su, \{Chun Hsien\} and Yao, \{Kai Wen\}",

year = "2007",

doi = "10.1109/SOCC.2007.4545468",

language = "英语",

isbn = "9781424415922",

series = "Proceedings - 20th Anniversary IEEE International SOC Conference",

pages = "247--250",

booktitle = "Proceedings - 20th Anniversary IEEE International SOC Conference",

note = "20th Anniversary IEEE International SOC Conference ; Conference date: 26-09-2007 Through 29-09-2007",

}

Gong, CSA, Shiue, MT, Hong, CT, Su, CH & Yao, KW 2007, Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications. 於 Proceedings - 20th Anniversary IEEE International SOC Conference., 4545468, Proceedings - 20th Anniversary IEEE International SOC Conference, 頁 247-250, 20th Anniversary IEEE International SOC Conference, Hsinchu, 台灣, 26/09/07. https://doi.org/10.1109/SOCC.2007.4545468

Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications. / Gong, Cihun Siyong Alex; Shiue, Muh Tian; Hong, Ci Tong 等.
Proceedings - 20th Anniversary IEEE International SOC Conference. 2007. p. 247-250 4545468 (Proceedings - 20th Anniversary IEEE International SOC Conference).

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

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N2 - A complementary energy path adiabatic logic (CEPAL) designed for ubiquitous large-scaled digital systems achieves higher noise immunity, higher driving ability, and reduced power density than the prior quasi-static structure. By applying CEPAL to the clocked storage elements (i.e. DFFs) with a diode-shared scheme, the overall efficiency is dramatically improved without increasing the design overhead compared with the quasi-static implementation. A test module consists of an 8-bit CEPAL shift register (SFR) has been laid out in a 0.18-μm CMOS process. Post-layout analytic results, including parasitic effect and exhibiting the benefits of various aspects in the proposed fashion, are given as proof of concept.

AB - A complementary energy path adiabatic logic (CEPAL) designed for ubiquitous large-scaled digital systems achieves higher noise immunity, higher driving ability, and reduced power density than the prior quasi-static structure. By applying CEPAL to the clocked storage elements (i.e. DFFs) with a diode-shared scheme, the overall efficiency is dramatically improved without increasing the design overhead compared with the quasi-static implementation. A test module consists of an 8-bit CEPAL shift register (SFR) has been laid out in a 0.18-μm CMOS process. Post-layout analytic results, including parasitic effect and exhibiting the benefits of various aspects in the proposed fashion, are given as proof of concept.

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DO - 10.1109/SOCC.2007.4545468

M3 - 会议稿件

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SN - 9781424415922

T3 - Proceedings - 20th Anniversary IEEE International SOC Conference

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T2 - 20th Anniversary IEEE International SOC Conference

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ER -

Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications

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