摘要
Traditional full-bridge inverter architecture is simple and can be easily connected to the grid. However, the bridge architecture has problems such as shoot-through current, severe voltage slew rate, and large filter volume. In order to improve the above shortcomings, this paper proposes a dual-buck multilevel inverter module, which adopts a power transistor and a diode to form a switching arm to prevent the shoot-through current problem. The use of the multilevel scheme can reduce the step size of the PWM voltage and is beneficial to lessen the voltage slew rate and downsize the filter volume. In addition, to simplify the system complexity, this paper proposes an autonomous input capacitor and clamping capacitor balance control, so that the microprocessors between the modules do not need to communicate with each other. The experimental results verify the feasibility and effectiveness of the proposed cascadable dual-buck multilevel inverter module for high-voltage applications.
| 原文 | 英語 |
|---|---|
| 主出版物標題 | APEC 2020 - 35th Annual IEEE Applied Power Electronics Conference and Exposition |
| 發行者 | Institute of Electrical and Electronics Engineers Inc. |
| 頁面 | 2446-2450 |
| 頁數 | 5 |
| ISBN(電子) | 9781728148298 |
| DOIs | |
| 出版狀態 | 已出版 - 03 2020 |
| 對外發佈 | 是 |
| 事件 | 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020 - New Orleans, 美國 持續時間: 15 03 2020 → 19 03 2020 |
出版系列
| 名字 | Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC |
|---|---|
| 卷 | 2020-March |
Conference
| Conference | 35th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2020 |
|---|---|
| 國家/地區 | 美國 |
| 城市 | New Orleans |
| 期間 | 15/03/20 → 19/03/20 |
文獻附註
Publisher Copyright:© 2020 IEEE.
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指紋
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