Compact bit-parallel systolic montgomery multiplication over GF(2 m) generated by trinomials

Chiou Yng Lee*, Chin Chin Chen, Erl Huei Lu

*此作品的通信作者

研究成果: 圖書/報告稿件的類型會議稿件同行評審

7 引文 斯高帕斯(Scopus)

摘要

This paper presents a scalable and systolic Montgomery's algorithm in GF(2m) using the Hankel matrix-vector representation. The hardware architectures derived from this algorithm represents low-complexity bit-parallel systolic multipliers with trinomials. The results reveal that our proposed multiplier saves approximately 36% space complexity as compared to an existing systolic Montgomery multiplier for trinomials. Moreover, the proposed architectures have the features of regularity, modularity, and local interconnect ability. Accordingly, they are well suited for VLSI implementation.

原文英語
主出版物標題2006 IEEE Region 10 Conference, TENCON 2006
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(列印)1424405491, 9781424405497
DOIs
出版狀態已出版 - 2006
事件2006 IEEE Region 10 Conference, TENCON 2006 - Hong Kong, 中國
持續時間: 14 11 200617 11 2006

出版系列

名字IEEE Region 10 Annual International Conference, Proceedings/TENCON
ISSN(列印)2159-3442
ISSN(電子)2159-3450

Conference

Conference2006 IEEE Region 10 Conference, TENCON 2006
國家/地區中國
城市Hong Kong
期間14/11/0617/11/06

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