Digital design and implementation of fast power data detector

Wei Neng Chang*, Wei Hao Peng, Kuan Dih Yeh

*此作品的通信作者

研究成果: 會議稿件的類型論文同行評審

3 引文 斯高帕斯(Scopus)

摘要

This paper introduces the digital design and implementation of a fast power data detector operated for the fundamental frequency (50 or 60 Hz). The detector can measure the complete power data, including rms values of current and voltage, real and imaginary powers, complex power, and power factor simultaneously with quick response time. First, the detection equations are derived. Then, the simulation is made to verify the effectiveness of detection. Finally, the digital implementation is accomplished by using the TMS320C31 floating-point DSP. The experimental results are given for verification.

原文英語
頁面623-627
頁數5
出版狀態已出版 - 2001
事件4th IEEE International Conference on Power Electronics and Drive Systems - Denpasar, Bali, 印度尼西亞
持續時間: 22 10 200125 10 2001

Conference

Conference4th IEEE International Conference on Power Electronics and Drive Systems
國家/地區印度尼西亞
城市Denpasar, Bali
期間22/10/0125/10/01

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