@inproceedings{87b4c9f59a1b43d996284ebeafa44d12,
title = "Enabling circuit design using FinFETs through close ecosystem collaboration",
abstract = "Double-patterning lithography is required at 20 nm node for planar CMOS. At the 16 / 14 nm node, in order to deliver attractive amount of Performance-Power-Area enhancement, 3-D FinFETs are required. Close collaboration at design ecosystem among fabrication foundry, EDA vendors, IP vendors, packaging vendors, and design houses is crucial for successful migration to FinFET circuits. This paper describes key issues in enabling circuit design using FinFETs and how to address them effectively.",
author = "Sheu, \{Bing J.\} and Chang, \{Chih Sheng\} and Chen, \{Yen Huei\} and Ken Wang and Chen, \{Kuo Ji\} and Peng, \{Yung Chow\} and Tien, \{Li Chun\} and Song, \{Ming Hsiang\} and Cliff Hou and Sun, \{Jack Yuan Chen\} and Chenming Hu",
year = "2013",
language = "英语",
isbn = "9784863483484",
series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",
pages = "T110--T111",
booktitle = "2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers",
note = "2013 Symposium on VLSI Circuits, VLSIC 2013 ; Conference date: 12-06-2013 Through 14-06-2013",
}