First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

B. Y. Tsui; C. L. Hung; T. K. Tsai; Y. C. Tsui; T. W. Wang; Y. X. Wen; C. P. Shih; J. C. Wang; L. J. Lin; C. H. Wang; K. W. Chu; P. H. Chen

doi:10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

B. Y. Tsui^*, C. L. Hung, T. K. Tsai, Y. C. Tsui, T. W. Wang, Y. X. Wen, C. P. Shih, J. C. Wang, L. J. Lin, C. H. Wang, K. W. Chu, P. H. Chen

^*此作品的通信作者

National Yang Ming Chiao Tung University

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

16 引文斯高帕斯（Scopus）

摘要

In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

原文	英語
主出版物標題	2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	321-324
頁數	4
ISBN（電子）	9781665422017
DOIs	https://doi.org/10.1109/ISPSD49238.2022.9813677
出版狀態	已出版 - 2022
對外發佈	是
事件	34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 - Vancouver, 加拿大持續時間: 22 05 2022 → 25 05 2022

出版系列

名字	Proceedings of the International Symposium on Power Semiconductor Devices and ICs
卷	2022-May
ISSN（列印）	1063-6854

Conference

Conference	34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022
國家/地區	加拿大
城市	Vancouver
期間	22/05/22 → 25/05/22

文獻附註

Publisher Copyright:
© 2022 IEEE.

存取文件

10.1109/ISPSD49238.2022.9813677

其它文件與鏈接

Link to publication in Scopus

引用此

Tsui, B. Y., Hung, C. L., Tsai, T. K., Tsui, Y. C., Wang, T. W., Wen, Y. X., Shih, C. P., Wang, J. C., Lin, L. J., Wang, C. H., Chu, K. W., & Chen, P. H. (2022). First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. 於 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 (頁 321-324). (Proceedings of the International Symposium on Power Semiconductor Devices and ICs; 卷 2022-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISPSD49238.2022.9813677

Tsui, B. Y. ; Hung, C. L. ; Tsai, T. K. 等. / First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. 頁 321-324 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs).

@inproceedings{e82a183c7b2e4b308823705b387a5c55,

title = "First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip",

abstract = "In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.",

keywords = "CMOS, VDMOSFET, gate driver, isolation, power IC, silicon carbide, single-chip integration",

author = "Tsui, {B. Y.} and Hung, {C. L.} and Tsai, {T. K.} and Tsui, {Y. C.} and Wang, {T. W.} and Wen, {Y. X.} and Shih, {C. P.} and Wang, {J. C.} and Lin, {L. J.} and Wang, {C. H.} and Chu, {K. W.} and Chen, {P. H.}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022 ; Conference date: 22-05-2022 Through 25-05-2022",

year = "2022",

doi = "10.1109/ISPSD49238.2022.9813677",

language = "英语",

series = "Proceedings of the International Symposium on Power Semiconductor Devices and ICs",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "321--324",

booktitle = "2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022",

address = "美国",

}

Tsui, BY, Hung, CL, Tsai, TK, Tsui, YC, Wang, TW, Wen, YX, Shih, CP, Wang, JC, Lin, LJ, Wang, CH, Chu, KW & Chen, PH 2022, First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. 於 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Proceedings of the International Symposium on Power Semiconductor Devices and ICs, 卷 2022-May, Institute of Electrical and Electronics Engineers Inc., 頁 321-324, 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022, Vancouver, 加拿大, 22/05/22. https://doi.org/10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. / Tsui, B. Y.; Hung, C. L.; Tsai, T. K. 等.
2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 321-324 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs; 卷 2022-May).

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

TY - GEN

T1 - First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

AU - Tsui, B. Y.

AU - Hung, C. L.

AU - Tsai, T. K.

AU - Tsui, Y. C.

AU - Wang, T. W.

AU - Wen, Y. X.

AU - Shih, C. P.

AU - Wang, J. C.

AU - Lin, L. J.

AU - Wang, C. H.

AU - Chu, K. W.

AU - Chen, P. H.

PY - 2022

Y1 - 2022

N2 - In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

AB - In this work, we reported the integration of 10-V CMOS logic circuit, 20-V gate driver, and 600-V VDMOSFET on a 4H-SiC single chip for full SiC smart power ICs. This integration process features PMOSFET isolation (P-iso) from the high voltage substrate, local oxidation of SiC isolation between devices, dual gate oxide thickness, and P+ poly-Si gate. It is demonstrated that the blocking capability of the P-iso structure can exceed 700 V and the switch of the VDMOSFET can be controlled by a 10-V signal through a 10-V to 20-V level shifter and a 20-V gate driver.

KW - CMOS

KW - VDMOSFET

KW - gate driver

KW - isolation

KW - power IC

KW - silicon carbide

KW - single-chip integration

UR - http://www.scopus.com/inward/record.url?scp=85128695426&partnerID=8YFLogxK

U2 - 10.1109/ISPSD49238.2022.9813677

DO - 10.1109/ISPSD49238.2022.9813677

M3 - 会议稿件

AN - SCOPUS:85128695426

T3 - Proceedings of the International Symposium on Power Semiconductor Devices and ICs

SP - 321

EP - 324

BT - 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 34th IEEE International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022

Y2 - 22 May 2022 through 25 May 2022

ER -

Tsui BY, Hung CL, Tsai TK, Tsui YC, Wang TW, Wen YX 等. First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip. 於 2022 34th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 321-324. (Proceedings of the International Symposium on Power Semiconductor Devices and ICs). doi: 10.1109/ISPSD49238.2022.9813677

First Integration of 10-V CMOS Logic Circuit, 20-V Gate Driver, and 600-V VDMOSFET on a 4H-SiC Single Chip

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