General-Purpose Neural Chips with Electrically Programmable Synapses and Gain-Adjustable Neurons

Bang W. Lee; Bing J. Sheu

doi:10.1109/4.149421

General-Purpose Neural Chips with Electrically Programmable Synapses and Gain-Adjustable Neurons

Bang W. Lee
, Bing J. Sheu

University of Southern California

研究成果: 期刊稿件 › 文章 › 同行評審

13 引文斯高帕斯（Scopus）

摘要

Circuit cells for DRAM-style programmable syn- apses and gain-adjustable neurons, which achieve high packing density and hardware annealing, are described. The 8-b accuracy in synapse weights can be achieved in a 0.2-s refresh cycle and the gain-adjustable neurons can be used to apply the hardware annealing technique for efficient searching of the optimal solution.

原文	英語
頁（從 - 到）	1299-1302
頁數	4
期刊	IEEE Journal of Solid-State Circuits
卷	27
發行號	9
DOIs	https://doi.org/10.1109/4.149421
出版狀態	已出版 - 09 1992
對外發佈	是

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abstract = "Circuit cells for DRAM-style programmable syn- apses and gain-adjustable neurons, which achieve high packing density and hardware annealing, are described. The 8-b accuracy in synapse weights can be achieved in a 0.2-s refresh cycle and the gain-adjustable neurons can be used to apply the hardware annealing technique for efficient searching of the optimal solution.",

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AB - Circuit cells for DRAM-style programmable syn- apses and gain-adjustable neurons, which achieve high packing density and hardware annealing, are described. The 8-b accuracy in synapse weights can be achieved in a 0.2-s refresh cycle and the gain-adjustable neurons can be used to apply the hardware annealing technique for efficient searching of the optimal solution.

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General-Purpose Neural Chips with Electrically Programmable Synapses and Gain-Adjustable Neurons

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