摘要
The adjoint network reduction technique has been shown to reduce 50% of the computational complexity of constructing the congruence transformation matrix. The method was suitable for analyzing the special multi-port driving-point impedance of RLC interconnect circuits. This paper extends this technique for the general circumstances of RLC interconnects. Comparative studies among the conventional methods and the proposed methods are also investigated. Experimental results will demonstrate the accuracy and the efficiency of the proposal method.
原文 | 英語 |
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頁(從 - 到) | I185-I188 |
期刊 | Proceedings - IEEE International Symposium on Circuits and Systems |
卷 | 1 |
出版狀態 | 已出版 - 2004 |
事件 | 2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, 加拿大 持續時間: 23 05 2004 → 26 05 2004 |