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Hardware annealing in electronic neural networks

  • Bang W. Lee*
  • , Bing J. Sheu
  • *此作品的通信作者
  • University of Southern California

研究成果: 期刊稿件文章同行評審

22 引文 斯高帕斯(Scopus)

摘要

A simulated hardware annealing process for electronic neural circuits is derived from the analogy between the temperature in a Boltzmann machine and the amplifier gain in a VLSI chip. Here, varying the amplifier gain is equivalent to changing the temperature of the probability function in a Boltzman machine. Decrease in the amplifier voltage gain is equivalent to temperature increase. The beginning and final annealing temperatures for the hardware annealing can be precisely determined. Theory and experimental results on a 4-b Hopfield analog-to-digital converters with simulated annealing are presented.

原文英語
頁(從 - 到)134-137
頁數4
期刊IEEE Transactions on Circuits and Systems
38
發行號1
DOIs
出版狀態已出版 - 1991
對外發佈

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