摘要
This paper designs an optimized hardware generator (IP Generator) based on convolutional neural networks. Users can use IP Generator to create any hardware architectures for neural network model they want. By the efficient user interface, the IP generator can output the architecture. You can get the corresponding optimized Verilog code efficiently. The network is a network model that simplifies some network layers by Yolo-v1. It can run 100MHz on Xilinx ZCU102 board which can reach 28.8GOP/s.
原文 | 英語 |
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主出版物標題 | 2021 IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2021 |
發行者 | Institute of Electrical and Electronics Engineers Inc. |
ISBN(電子) | 9781665433280 |
DOIs | |
出版狀態 | 已出版 - 2021 |
對外發佈 | 是 |
事件 | 8th IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2021 - Penghu, 台灣 持續時間: 15 09 2021 → 17 09 2021 |
出版系列
名字 | 2021 IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2021 |
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Conference
Conference | 8th IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2021 |
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國家/地區 | 台灣 |
城市 | Penghu |
期間 | 15/09/21 → 17/09/21 |
文獻附註
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