High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current I_off significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current I_on is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current I_on effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.