High-Speed Three-Phase Enhanced Phase-Locked Loop for Grid Synchronization Under Adverse Conditions

In this paper, a modified enhanced phase-locked loop (EPLL) is proposed for grid synchronization. This model can achieve a high speed estimation of voltage magnitude, phase, and frequency parameters of the grid voltage. This proposed model is based on the phase error compensation technique that results in immediate tracking of phase variations of the three-phase grid voltage. The resultant input-output relationship of the phase angle is a simple transfer function with almost unity magnitude. One additional voltage loop is also included which can further assist in decoupling the voltage estimation variations due to phase or frequency changes. To enhance its dynamical performance even under adverse grid conditions with harmonics, an efficient Multiple Delayed Signal Cancellation (MDSC) pre-filter is utilized. Real-time simulation results endorse that in case of polluted grid environment, a pre-filter is highly necessary and such a design overall transfer function is equivalent to the pre-filter's transfer function.