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Hippocampal model implementation using VLSI table-look-up and model-based approaches

  • Richard H. Tsai*
  • , Eric Y. Chou
  • , Bing J. Sheu
  • , Theodore W. Berger
  • *此作品的通信作者
  • University of Southern California

研究成果: 會議稿件的類型論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

The hippocampus region of the brain system performs cognitive functions of learning and memory. VLSI design of a hippocampal model has been proposed and two mixed analog-digital chips which use analog circuits for parallel computing and digital circuits for interconnection were designed. The design with one extensive hippocampal neuron has been sent for fabrication. One of the objectives of this research effort is to incorporate adequate biological constraints into the microelectronic chips and systems.

原文英語
頁面1508-1512
頁數5
出版狀態已出版 - 1995
對外發佈
事件Proceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6) - Perth, Aust
持續時間: 27 11 199501 12 1995

Conference

ConferenceProceedings of the 1995 IEEE International Conference on Neural Networks. Part 1 (of 6)
城市Perth, Aust
期間27/11/9501/12/95

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