Impacts of Trap-State Generation on Tunnel Thin-Film Transistor

William Cheng Yu Ma*, Hui Shun Hsu, Chih Cheng Fang, Che Yu Jao, Tzu Han Liao

*此作品的通信作者

研究成果: 期刊稿件文章同行評審

6 引文 斯高帕斯(Scopus)

摘要

In this paper, the positive bias temperature instability (PBTI) of the tunnel thin-film transistor (TFT) is well studied and compared with the conventional-TFT. The tunnel-TFT exhibits superior PBTI immunity at high temperature and shows distinct temperature dependence of PBTI from the conventional-TFT. This is due to different influences of trap-state generation on electrical behavior of the two devices. For the poly-Si tunnel-TFT featuring trap-assisted tunneling (TAT), the impact of trap-state generation on tunneling probability is found to be temperature dependent. At lower temperature, the TAT current of a tunnel-TFT is reduced due to the lower interband transition probability, resulting in pronounced temperature dependence on the additional generated trap states after electrical stress. Therefore, the worst PBTI behavior of a tunnel-TFT occurs when the device is stressed at low temperature. Our results may be helpful to further reliability investigation of tunneling devices.

原文英語
頁(從 - 到)1363-1369
頁數7
期刊IEEE Transactions on Electron Devices
65
發行號4
DOIs
出版狀態已出版 - 04 2018
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Publisher Copyright:
© 2012 IEEE.

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