Improving the reverse blocking capability of carrier stored trench-gate bipolar transistor

C. M. Tan*, Y. F. Wong, P. H. Teoh, G. Y. Huang

*此作品的通信作者

研究成果: 圖書/報告稿件的類型會議稿件同行評審

3 引文 斯高帕斯(Scopus)

摘要

Recently, a new IGBT structure, carrier stored trench gate bipolar transistor (CSTBT) was introduced. This structure, modified from the Trench IGBT, preserves the good characteristics of trench IGBT, and also improves the trade off characteristic between the on-state voltage drop and switching loss. However, its reverse blocking voltage is only around 10 V. The low reverse blocking capability of the CSTBT could limit its application in power electronic circuits. To increase the reverse blocking voltage, a p-layer is added in between the P+-N+ junction. Simulation shows that the additional p-layer has no effect to the forward characteristic and the turn-on speed of the IGBT, except to increase the reverse blocking voltage to above 80 V.

原文英語
主出版物標題5th International Conference on Power Electronics and Drive Systems, PEDS 2003 - Proceedings
編輯King-Jet Tseng
發行者Institute of Electrical and Electronics Engineers Inc.
頁面89-92
頁數4
ISBN(電子)0780378857
DOIs
出版狀態已出版 - 2003
對外發佈
事件5th International Conference on Power Electronics and Drive Systems, PEDS 2003 - Singapore, 新加坡
持續時間: 17 11 200320 11 2003

出版系列

名字Proceedings of the International Conference on Power Electronics and Drive Systems
1

Conference

Conference5th International Conference on Power Electronics and Drive Systems, PEDS 2003
國家/地區新加坡
城市Singapore
期間17/11/0320/11/03

文獻附註

Publisher Copyright:
© 2003 IEEE.

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