@inproceedings{cda6cf98dbe840cb88fd0f5b5cff2008,
title = "Low-error and area-efficient fixed-width multiplier by using minor input correction vector",
abstract = "In this paper, we propose a new error compensation circuit by using dual group minor input correction vector to lower compensation error. By utilizing the symmetric property of MIC and construct the error compensation circuit mainly by the {"}outer{"} partial products, the hardware complexity can be lowered and only increases slightly as the multiplier input bits increase. In the proposed 16-bit fixed-width multiplier, the truncation error can be reduced by 87% as compared with the direct-truncated multiplier and the transistor counts can be reduced by 47% as compared with the full-length multiplier.",
keywords = "Area-efficient, Fixed-width multiplier, Low-error, Minor input correction vector",
author = "Wey, {I. Chyn} and Wang, {Chun Chien}",
year = "2010",
doi = "10.1109/ICEIE.2010.5559909",
language = "英语",
isbn = "9781424476800",
series = "ICEIE 2010 - 2010 International Conference on Electronics and Information Engineering, Proceedings",
pages = "V1118--V1122",
booktitle = "ICEIE 2010 - 2010 International Conference on Electronics and Information Engineering, Proceedings",
note = "2010 International Conference on Electronics and Information Engineering, ICEIE 2010 ; Conference date: 01-08-2010 Through 03-08-2010",
}