Low insertion loss Ka-band SPST switch using S-GCPW designs

Kuan Liang Cho*, Hsien Chin Chiu, Yen Chang Tu, Chia Sung Wu

*此作品的通信作者

研究成果: 圖書/報告稿件的類型會議稿件同行評審

摘要

This paper presented 28 GHz single-pole-single-throw switch using a 0.18 m CMOS process. The CMOS transistors are designed to have a high substrate resistance to minimize the insertion loss and improve power handling capability. The SPST switch has insertion loss of 7.2 dB and isolation is greater than-29 dB at 24 GHz.

原文英語
主出版物標題2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding
頁面26-28
頁數3
DOIs
出版狀態已出版 - 2012
事件2012 4th International High Speed Intelligent Communication Forum, HSIC 2012 - Nanjing, 中國
持續時間: 10 05 201211 05 2012

出版系列

名字2012 4th International High Speed Intelligent Communication Forum, HSIC 2012, Proceeding

Conference

Conference2012 4th International High Speed Intelligent Communication Forum, HSIC 2012
國家/地區中國
城市Nanjing
期間10/05/1211/05/12

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