Material, electrical, and optical characterizations of high-K Sm ₂TiO₅ dielectric deposited on polycrystalline silicon

This paper examines high-k Sm₂TiO₅ on polycrystalline silicon film treated in different annealing conditions and fabricated as a high-k gate dielectric. Material analyses, electrical characterizations, and optical measurements were performed to assess annealing effects and find an optimal annealing temperature. Results show that annealing at a temperature of 800°C effectively passivates defects such as dangling bonds and traps, and improves dielectric performance.