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Matrix-matrix multiplications and fault tolerance on hypercube multiprocessors

  • National Taiwan University
  • Chung Yuan Christian University

研究成果: 圖書/報告稿件的類型會議稿件同行評審

摘要

Several new algorithms for matrix-matrix multiplications on hypercube multiprocessors are presented and evaluated based on the number of multiplications, additions, and transfers. The matrices to be multiplied are uniformly distributed to all processors of a hypercube system. Each processor owns some submatrices which are derived by dividing the source matrices. Each submatrix multiplication can now be performed independently within a processor. All the partial results are then summed up and transferred to a single processor. An orthogonal tree is used for efficient communication. The time complexity is O(log2p) if p × p processors are used. In addition, the UDD (Uniform Data Distribution) approach is employed when some processors do not work properly and the faulty effects have been detected. Two classes of fault patterns are considered and evaluated.

原文英語
主出版物標題Proceedings of International Conference on Application Specific Array Processors, ASAP 1993
編輯Luigi Dadda, Benjamin Wah
發行者Institute of Electrical and Electronics Engineers Inc.
頁面176-179
頁數4
ISBN(電子)0818634928
DOIs
出版狀態已出版 - 1993
對外發佈
事件1993 International Conference on Application Specific Array Processors, ASAP 1993 - Venice, 意大利
持續時間: 25 10 199327 10 1993

出版系列

名字Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN(列印)2160-0511
ISSN(電子)2160-052X

Conference

Conference1993 International Conference on Application Specific Array Processors, ASAP 1993
國家/地區意大利
城市Venice
期間25/10/9327/10/93

文獻附註

Publisher Copyright:
© 1993 IEEE.

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