Monolayer MoS2 for nonvolatile memory applications

Kai Ping Chang; Jer Chyi Wang; Chang Hsiao Chen; Lain Jong Li; Chao Sung Lai

doi:10.1109/ICSICT.2016.7998959

Monolayer MoS₂ for nonvolatile memory applications

Kai Ping Chang, Jer Chyi Wang, Chang Hsiao Chen, Lain Jong Li, Chao Sung Lai

電子工程學系(含學碩博士班)

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

1 引文斯高帕斯（Scopus）

摘要

In this work, two-dimensional MoS2 has been performed for nonvolatile memory application as charge storage layer. The capacitance-voltage (C-V) hysteresis and programming characteristics of MoS2-NVMs with blocking oxide layer of various thicknesses have been further investigated. The MoS2-NVMs with 9-nm-thck blocking oxide layer exhibits a large hysteresis in the C-V sweeping and the fastest speed in programming characteristics. In addition, both electrons and holes can store in MoS2 monolayer, contributing to a promising application in future high-performance NVMs.

原文	英語
主出版物標題	2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
編輯	Yu-Long Jiang, Ting-Ao Tang, Ru Huang
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	489-491
頁數	3
ISBN（電子）	9781467397179
DOIs	https://doi.org/10.1109/ICSICT.2016.7998959
出版狀態	已出版 - 2016
事件	13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Hangzhou, 中國持續時間: 25 10 2016 → 28 10 2016

出版系列

名字	2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings

Conference

Conference	13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
國家/地區	中國
城市	Hangzhou
期間	25/10/16 → 28/10/16

文獻附註

Publisher Copyright:
© 2016 IEEE.

存取文件

10.1109/ICSICT.2016.7998959

其它文件與鏈接

Link to publication in Scopus

引用此

Chang, K. P., Wang, J. C., Chen, C. H., Li, L. J., & Lai, C. S. (2016). Monolayer MoS₂ for nonvolatile memory applications. 於 Y.-L. Jiang, T.-A. Tang, & R. Huang (編輯), 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings (頁 489-491). 文章 7998959 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSICT.2016.7998959

Chang, Kai Ping ; Wang, Jer Chyi ; Chen, Chang Hsiao 等. / Monolayer MoS₂ for nonvolatile memory applications. 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. 編輯 / Yu-Long Jiang ; Ting-Ao Tang ; Ru Huang. Institute of Electrical and Electronics Engineers Inc., 2016. 頁 489-491 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings).

@inproceedings{03d9319bb3394409960a67e285a71584,

title = "Monolayer MoS2 for nonvolatile memory applications",

abstract = "In this work, two-dimensional MoS2 has been performed for nonvolatile memory application as charge storage layer. The capacitance-voltage (C-V) hysteresis and programming characteristics of MoS2-NVMs with blocking oxide layer of various thicknesses have been further investigated. The MoS2-NVMs with 9-nm-thck blocking oxide layer exhibits a large hysteresis in the C-V sweeping and the fastest speed in programming characteristics. In addition, both electrons and holes can store in MoS2 monolayer, contributing to a promising application in future high-performance NVMs.",

author = "Chang, {Kai Ping} and Wang, {Jer Chyi} and Chen, {Chang Hsiao} and Li, {Lain Jong} and Lai, {Chao Sung}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 ; Conference date: 25-10-2016 Through 28-10-2016",

year = "2016",

doi = "10.1109/ICSICT.2016.7998959",

language = "英语",

series = "2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "489--491",

editor = "Yu-Long Jiang and Ting-Ao Tang and Ru Huang",

booktitle = "2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings",

address = "美国",

}

Chang, KP, Wang, JC, Chen, CH, Li, LJ & Lai, CS 2016, Monolayer MoS₂ for nonvolatile memory applications. 於 Y-L Jiang, T-A Tang & R Huang (編輯), 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings., 7998959, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 頁 489-491, 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016, Hangzhou, 中國, 25/10/16. https://doi.org/10.1109/ICSICT.2016.7998959

Monolayer MoS₂ for nonvolatile memory applications. / Chang, Kai Ping; Wang, Jer Chyi; Chen, Chang Hsiao 等.
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. 編輯 / Yu-Long Jiang; Ting-Ao Tang; Ru Huang. Institute of Electrical and Electronics Engineers Inc., 2016. p. 489-491 7998959 (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings).

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

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T1 - Monolayer MoS2 for nonvolatile memory applications

AU - Chang, Kai Ping

AU - Wang, Jer Chyi

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AU - Li, Lain Jong

AU - Lai, Chao Sung

PY - 2016

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N2 - In this work, two-dimensional MoS2 has been performed for nonvolatile memory application as charge storage layer. The capacitance-voltage (C-V) hysteresis and programming characteristics of MoS2-NVMs with blocking oxide layer of various thicknesses have been further investigated. The MoS2-NVMs with 9-nm-thck blocking oxide layer exhibits a large hysteresis in the C-V sweeping and the fastest speed in programming characteristics. In addition, both electrons and holes can store in MoS2 monolayer, contributing to a promising application in future high-performance NVMs.

AB - In this work, two-dimensional MoS2 has been performed for nonvolatile memory application as charge storage layer. The capacitance-voltage (C-V) hysteresis and programming characteristics of MoS2-NVMs with blocking oxide layer of various thicknesses have been further investigated. The MoS2-NVMs with 9-nm-thck blocking oxide layer exhibits a large hysteresis in the C-V sweeping and the fastest speed in programming characteristics. In addition, both electrons and holes can store in MoS2 monolayer, contributing to a promising application in future high-performance NVMs.

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BT - 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings

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PB - Institute of Electrical and Electronics Engineers Inc.

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Chang KP, Wang JC, Chen CH, Li LJ, Lai CS. Monolayer MoS₂ for nonvolatile memory applications. 於 Jiang YL, Tang TA, Huang R, 編輯, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2016. p. 489-491. 7998959. (2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings). doi: 10.1109/ICSICT.2016.7998959